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LIST OF PUBLICATIONS I.  IEEE Journals & Conferences II. Patents & Trademarks

I. IEEE Journals & Conferences
1. G.Y. Yacoub, "How do you select a high quality EDA tool flow" IEEE International Symposium on Quality Design (ISQED), Panelist, March 20, 2000. (eetimes).
2. T. Soni, L.J. Malone, and G.Y. Yacoub, "Real-Time Algorithm Exploration for Spread Spectrum Communication Applications," Sixth International Conference on Signal Processing Applications and Technology (ICSPAT ‘95), October 1995.
3. G.Y. Yacoub, L.J. Malone, and T. Soni, "Field Programmable Routers," Sixth International Conference on Signal Processing Applications and Technology (ICSPAT ‘95), October 1995.
4. G.Y. Yacoub, "Layered Self-Timed Interfaces for IC Systems [Abstract]", Ph.D. Dissertation, University of California, San Diego, June 1993.
5. G.Y. Yacoub, T. Soni, and W.H. Ku, "A Compact Array Processor Based on Self-Timed Simultaneous Bi-directional Signaling [Abstract] [Full Text]," Proceedings of 1993 IEEE International Symposium on Circuits and Systems, pp. 1893-1896, May 1993.
6. G.Y. Yacoub, T. Soni, and W.H. Ku, "Optimization of Layered Self-Timed Interfaces [Abstract] [Full Text]," Proceedings of 1992 IEEE 26th Asilomar Conference on Signals, Systems, and Computers, October 26-28, pp. 289-293, 1992.
7. G.Y. Yacoub and W.H. Ku, "Self-Timed Simultaneous Bi-directional Signaling for IC Systems [Abstract] [Full Text]," Proceedings of 1992 IEEE International Symposium on Circuits and Systems, pp. 2957-2960, May 1992.
8. E.L. Atlas, O. Barkan, W.L. Marking, G.Y. Yacoub, et. al., "Development of Pixel Detectors for SSC Vertex Tracking [Full Text]," Third Annual International Industrial Symposium on the Super Collider, Atlanta, Georgia, March 13-15, 1991.
9. O. Barkan, E.L. Atlas, W.L. Marking, G.Y. Yacoub, et. al., "Development of a Customized SSC Pixel Detector Readout for Vertex Tracking [Full Text]," Symposium on Detector Research and Development for the Superconducting Super Collider, Fort Worth, Texas, October 15-18, 1990.
10. G.Y. Yacoub and W.H. Ku, "An Enhanced Technique for Simulating Short-Circuit Power Dissipation [Full Text]," IEEE Journal of Solid-State Circuits, vol. 24, no. 3, pp. 844-847, June 1989.
11. G.Y. Yacoub and W.H. Ku, "An accurate Simulation Technique for Short-Circuit Power Dissipation Based on Current Component Isolation [Full Text]," Proceedings of 1989 IEEE International Symposium on Circuits and Systems, pp. 1157-1161, May 1989.
12. G.Y. Yacoub, H. Pham, M. Ma, and E.G. Friedman, "A System for Critical Path Analysis Based on Back Annotation and Distributed Interconnect Impedance Models [Abstract]," Microelectronics Journal, Vol. 19, No. 3, June 1988, pp. 21-30.
13. G.Y. Yacoub and E.G. Friedman, "An Environment Sensitive Circuit Design Technique for Modeling VLSI Interconnect Impedances," Proceedings of 1987 Government Microcircuits Applications Conference, pp. 391-394, October 1987.
14. E.G. Friedman, G.Y. Yacoub, S.R. Powell, et. al. "A Signal Tracking Chip Utilizing a VHSIC CMOS/SOS Structured Custom Design Methodology," Proceedings of 1986 Government Microcircuits Applications Conference, pp. 217-222, October 1986.
15. E.G. Friedman, G.Y. Yacoub, and S.R. Powell, "A CMOS/SOS VLSI Design System," Journal of Semicustom ICs, Vol. 2, No. 4, pp. 5-11, June 1985.
16. E.G. Friedman, G.Y. Yacoub, and S.R. Powell, "A Hierarchical VLSI Design System for Synthesizing CMOS/SOS Integrated Circuits," Presented at the 1984 IEEE SOS/SOI Technology Workshop, October 1984.
17. E.G. Friedman and G.Y. Yacoub, "A Two-Level Metal, Software Compatible CMOS/SOS Gate Array Family [Full Text]," Microelectronics Journal (Special Issue on Silicon-On-Insulators), Col. 14, No. 6, pp. 117-118, November/December 1983 and presented at the 1983 IEEE SOS/SOI Technology Workshop, October 1983.

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II. Patents & Trademarks
1. G.Y. Yacoub, IndiaWorld. US Federal Trademark Registration 1969848, US Classes 100, 101. April 23, 1996.
2. O. Barkan, G.Y. Yacoub, and G. Kramer. Sparse Readout Method and Apparatus for a Pixel Array [Full Text]. European Patent 91,116,237.8-, November 15, 1990. U.S. Patent 5,107,122, April 21, 1992.

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